From CISC to RISC to ZISC
By Sheldon Liebman (1998)
The evolution of computing technology has produced some very interesting devices. However long the list, it’s a good bet that a ZISC chip should be on it. ZISC stands for Zero Instruction Set Computer and it’s a technology that was jointly developed by IBM in Paris and by Guy Paillet, Chairman of Sunnyvale, CA-based Silicon Recognition, Inc.
Although it may sound like to contradiction to refer to a computer as having zero instructions, that is actually a pretty good description of this technology. The first generation of ZISC chip contains 36 independent cells that can be thought of as neurons or parallel processors. Each of these cells is designed to compare an input vector of up to 64 Bytes with a similar vector stored in the cell’s memory.
If the input vector matches the vector in the cell’s memory, it fires. Otherwise, it doesn’t. As a parallel architecture, the ZISC chip tells all 36 cells to compare their memory to the input vector at the same time. As output, the chip effectively provides the number of the cell that had a match or indicates that no matches occurred.
Silicon Recognition has developed a technology around the ZISC chips called Parallel Associative Learning Memory, or PALM. PALM Technology combines a control system, typically an FPGA and DRAM memory, with one or more ZISC chips to create a standalone, hardwired recognition system.
In a traditional serial environment devoted to pattern matching, a computer program basically loads a pattern into memory, then fetches a stored pattern from each location in a large array. After fetching the pattern, it does a comparison, then fetches the data from the next location and continues the process. As the number of patterns you need to check grows, the speed of the process decreases. With a very fast computer, tens or hundreds of patterns may be able to be checked in a real-time environment, but eventually, a limit is reached.
This is because you need to look at what’s in every array location to see if there is a match. With ZISC chips and PALM technology, the system provides the location of the match without having to look at what’s in that location. Instead of looking at the problem as "What’s in array location 12 and does it match?" the problem becomes "location 12 matches." By eliminating the step of loading and comparing the pattern for each location, the speed of the system increases dramatically.
If you only need to compare an input pattern to 36 potential matches, it’s tough to see how ZISC computing provides a real advantage over traditional computing. However, the real power of ZISC is in its scalability. A ZISC network can be expanded by adding more ZISC devices without suffering a decrease in recognition speed. According to Silicon Recognition, there is no theoretical limitation on the number of cells that can be in a network. The company regularly discusses networks with 10,000 or more cells.
One way to think about this is to imagine a large sports arena with seating for 10,000 people. If you make an announcement over the public address system, every person in the stadium hears it at virtually the same time and can process the announcement in a truly parallel fashion. In a serial version, the announcer may move from seat to seat and speak with one person at a time. Let’s say the goal is to determine if "Sheldon Liebman is in the house." With parallel processing, I can immediately stand up and shout "Section A, Row 12, Seat 3." In the serial version, the process is much slower.
Thus far, we’ve illustrated the process of finding an exact match to an input vector, but ZISC chips can also be used to find fuzzy matches. Instead of asking if there’s an exact match, you can ask for the closest match. Then, cells that are above a certain threshold fire simultaneously and the controller in the chip looks at which one returns the closest value. For example, location 12 may have a 63/64 match and location 14 has 62/64. In this case, the system returns that location 12 is the "best" match. At that point, higher level software can determine if the match is "appropriate" through automatic or manual methods.
This leads us into the area of training a ZISC-based system to perform pattern recognition. As an example, let’s assume that we are trying to categorize apples on a conveyor belt as Red, Green or Yellow. We might start to picking 100 different Red apples and presenting them to the system. If they match an existing pattern, they are classified as Red. If they don’t, we instruct the system to add this pattern to a new cell. Next we do the same with 100 Green apples and 100 Yellow apples. Now, the first 100 locations define Red, the second 100 Define Green and the third 100 define Yellow. Based on which location is returned as a match, we can begin to classify our apples. However, it’s reasonable to assume that eventually, we’ll get an apple that confuses the system. When this occurs, we can add the pattern for this apple to a new cell and instruct the system as to whether that new cell refers to Red, Yellow or Green. You can also instruct by counterexample. If the system mistakes a Green apple for a Red one, you can "correct" it and add the pattern to a new cell. Eventually, the system will "learn" the different to a very high degree of accuracy. If you have 1000 sample apples, for example, you may want to use the first 300 to train the system and the next 700 to test it.
The characteristics of the ZISC chip make it useful in two very specific situations. The first is as a recognition engine plugged into a traditional computer. Silicon Recognition actually offers PCI, ISA and VME cards that fit this description. In this environment, the ZISC chips are used to offload the recognition function from a general-purpose computer.
The second application is where you need to tie recognition to a particular function that isn’t being controlled by a full-size computer. ZISC chips use very little power and can be put into very portable environments. For this type of application, Silicon Recognition offers 84-pin SIMs (Single Inline Modules) that contain either 3 or 6 ZISC chips with up to 216 processors.
The company provided a real world example of this type of application in the agriculture industry. A computerized system was developed to spray weeds that grow intermixed with crops. A system was developed that places a camera on a moving appliance that covers twelve rows of crops at a time and has 12 spray nozzles attached, one for each row. Moving at approximately two miles per hour, the camera captures data and the ZISC chips determine if the spray head is over ground, crop or weed. If it’s over weeds, the spray head is activated. In this type of environment, a full size computer just can’t be used.
There are a number of other applications that are particularly well suited to ZISC. Face recognition is one example. If your pattern is recognized, access can be granted to software or to a specific location. If this technology was incorporated into a video camera at your front door, your house could actually unlock automatically and the front door open as you approached.
Real-time monitoring is another area well suited to ZISC chips. In France, a system is being used to count the number of people that go through a particular area each day. Since the system can continue to learn, it knows the difference between a head and a backpack, for example.
At Lawrence Livermore Labs, ZISC is being used to inspect the optics of large laser systems. Each time the laser is fired, the optics are checked for cracks and other defects. Depending on what is found, the system decides if it is safe to fire the laser again. In applications like this, secondary processing is used once a "match" is made through ZISC. Perhaps the defect will allow the laser to be fired once more, or twice. That response depends on the location of the match.
As technology advances, ZISC chips are expected to hold more cells and work even faster for less money. The current generation ZISC36 chip was developed using 1 micron technology at IBM. Work is being done to improve the density of the chips and Silicon Recognition is hopeful that up to 200 cells may be able to exist in a future version. Today’s ZISC chip operates at 20 MHz and can determine a match among 10,000 patterns in less than 3 microseconds. The next generation may operate at up to 100 MHz for a significant speed increase. Current Silicon Recognition products start at approximately $1000 for a board with a single ZISC chip. The company hopes to halve that number by the end of this year.
From CISC to RISC and now to ZISC.
Zero has never been such a significant number.